(1) Field of the Invention
The present invention relates to processes used to fabricate semiconductor devices, and more specifically to a process used to bond gold wires to an underlying copper interconnect structure.
(2) Description of Prior Art
The use of copper interconnect structures has allowed increased semiconductor device performance to be realized, as a result of the less resistant copper interconnects, when compared to aluminum based counterparts. In addition, the use of damascene processing, has allowed a reduction of the topography of advanced semiconductor devices, resulting from several metal, as well as passivation levels, to be realized. The chemical mechanical polishing procedure, used to remove unwanted regions of copper, from the top surface of a passivation layer, results in reduced topography in the form of a smooth top surface, comprised of a copper damascene structure, embedded in a damascene opening in an insulator layer. The smooth top surface however, can present difficulties, in the form of adhesion loss, when a protective molding substance, is applied on the smooth surface, after creating gold bonds to the copper damascene structure. The adhesion of the molding substance, to the underlying, smooth, top surface topography of the passivation layer, would be improved with a rougher underlying topography. In addition the success of gold bonding would be increased if the gold bonds were made on a material other than copper.
This invention will describe a process in which adhesion of a molding compound, applied to an underlying semiconductor chip, comprised with copper damascene structures, is improved via creation of non-smooth topography, resulting from aluminum structures, overlying, and extending upwards, from an underlying copper damascene structure. In addition this invention will also describe the fabrication of "dummy" aluminum structures, placed entirely on underlying passivating insulator layers, for the purpose of further increasing topography, and thus further improving the adhesion of the molding substance to the underlying semiconductor chip. Another objective of this invention is ease the bonding process, by bonding the gold wire, directly to the aluminum extension, which directly overlays the copper damascene structure, thus avoiding the more difficult bonding procedure of gold to copper. Prior art, such as Ijima et al, in U.S. Pat. No. 5,563,445, describe the use of "dummy bumps" to maintain specified distance between a semiconductor chip, and a circuit board, using materials, as well as a process sequence, different than the materials, and process sequence, used in the present invention.